ADCLK925 pdf datasheet Ultrafast SiGe ECL Clock/Data Buffers

这家软件站机械电子分类下的ADCLK925 pdf datasheet Ultrafast SiGe ECL Clock/Data Buffers，文件大小为293KB，适用系统为Vista, Win2003, WinXP, Win2000, NT，以下为介绍或使用方法。

The ADCLK905 (one input, one output), ADCLK907 (dual one input, one output), and ADCLK925 (one input, two outputs) are ultrafast clock/data buffers fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process.

The ADCLK905/ADCLK907/ADCLK925 feature full-swing emitter coupled logic (ECL) output drivers. For PECL (positive ECL) operation, bias V_CC to the positive supply and V_EE to ground. For NECL (negative ECL) operation, bias V_CC to ground and V_EE to the negative supply.

The buffers offer 95 ps propagation delay, 7.5 GHz toggle rate, 10 Gbps data rate, and 60 fs random jitter (RJ).

The inputs have center-tapped, 100 Ω, on-chip termination resistors. A V_REF pin is available for biasing ac-coupled inputs.

The ECL output stages are designed to directly drive 800 mV each side into 50 Ω terminated to V_CC − 2 V for a total differential output swing of 1.6 V.

The ADCLK905/ADCLK907/ADCLK925 are available in 16-lead LFCSP packages. 这家软件站 WwW.ZjKWeiQi.cN